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¡Û Analog & BCD


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- Analog & BCD ¼ÒÀÚ °³¹ß

- CMOS/BJT/DEMOS/LDMOS/Passives ¼ÒÀÚ Æ¯¼º

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- Module Process set-up ¹× Full Process

Integration

- Test Pattern (TEG) Á¦ÀÛ ¹× ¼ÒÀÚ characterization

- Design Rule doc. ¹× PDK deliverables Á¦ÀÛ


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- Analog & BCD ¼ÒÀÚ°³¹ß °æ·Â 2³â ÀÌ»ó(¼®»ç), 4³â ÀÌ»ó(Çлç)

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- TCAD Simulation tool È°¿ë ¼÷·ÃÀÚ
 

¡Û LV/MV MOSFET


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- LV/MV MOSFET Cell & Ring Design

- Test pattern ¼³°è ¹× Layout

- Trench Gate Module Process set-up ¹× Full

Process Integration

- Static & Dynamic Test ¹× Characterization


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- PowerDevice/Á¦Ç°°³¹ß °æ·Â 3³â ÀÌ»ó(¼®»ç), 5³â ÀÌ»ó(Çлç)

- TCAD »ç¿ë °¡´ÉÀÚ

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- Data-sheet Á¦ÀÛ ¹× Board ½ÇÀå Test À¯°æÇèÀÚ


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