• System architecture design
• AXI5¹× NoC Bus Æ÷ÇÔÇÑ architecture interface design
• °¢Á¾ IP(Â÷·®¿ë ¹× High speed I/F – PCIe,USB,TSN,ETHERNET,CAN FD,DDR,AP,DSP(processor) ) interface design
• ASIC, SoC ¶Ç´Â AP ¾ç»ê ¹× Chip Bring-Up
• UPF/CPF ±â¹Ý Low power simulation
• Synthesis/LINT/Equivalent Check/STA/CDC
• Gate-level simulation
• Functional Safety design(On-line DFT(LBIST,MBIST), Internal JTAG verification)
• Çз : ÃÊ´ëÁ¹(2,3³â) ÀÌ»ó
• °æ·Â : 8 ~ 15³â
• ASIC Full chip design (IP-XACT À¯°æÇèÀÚ)
• Many-core & Multi-core(MHU(Message Handling Unit) À¯°æÇèÀÚ)
• FPGA¿¡¼ verification °¡´É
• Computer architecture ÀÌÇØ
• SytemVerilog ¶Ç´Â VHDL/Verilog¸¦ È°¿ëÇÑ RTL ¼³°è Áö½Ä