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1. FPGA°³¹ß 1. Role (¿ªÇÒ) : FPGA ±â¹Ý ÀÓº£µðµå ½Ã½ºÅÛ °³¹ßÀÚ (FPGA + Firmware) 2. Responsibility (1) FPGA¸¦ Ȱ¿ëÇÑ Çϵå¿þ¾î ¼³°è ¹× ±¸Çö (Verilog/VHDL µî) (2) MCU ±â¹Ý Firmware °³¹ß (C/C++ Áß½É) (3) FPGA ¡ê MCU °£ ÀÎÅÍÆäÀ̽º ¼³°è ¹× ÃÖÀûÈ (4) Embedded system debugging ¹× ¼º´É ÃÖÀûÈ (5) Çϵå¿þ¾î Bring-up ¹× ½Ã½ºÅÛ ÅëÇÕ Å×½ºÆ® (6) ȸ·Îµµ ¸®ºä ¹× HW/FW ¿¬µ¿ °ËÁõ 3. Required Competency (1) FPGA ¼³°è ¹× °³¹ß °æÇè (3³â ÀÌ»ó ±ÇÀå) (2) Verilog ¶Ç´Â VHDLÀ» Ȱ¿ëÇÑ RTL °³¹ß ´É·Â (3) MCU ¶Ç´Â SoC ±â¹Ý Æß¿þ¾î °³¹ß °æÇè (C/C++ ´É¼÷) (4) SPI, I2C, UART µî ´Ù¾çÇÑ µðÁöÅÐ Åë½Å ÀÌÇØ (5) Logic analyzer, Oscilloscope µî °èÃø±â »ç¿ë¿¡ Àͼ÷ÇÑ ºÐ (6) ¿ì´ë»çÇ× 1) Zynq, Intel SoC FPGA µî FPGA + ARM ±â¹Ý °³¹ß °æÇè 2) RTOS ±â¹Ý ½Ã½ºÅÛ °³¹ß °æÇè 3) Çϵå¿þ¾î ȸ·Î ¼³°è ¹× PCB ¼³°è¿¡ ´ëÇÑ ÀÌÇØ 4) °í¼Ó ½ÅÈ£ ó¸® (DDR, LVDS µî) °æÇèÀÚ 5) Git ±â¹Ý Çù¾÷ ȯ°æ °æÇè 6) ¿µ¾î ±â¼ú ¹®¼ ÀÌÇØ °¡´ÉÀÚ 2. FW°³¹ß(SDK) 1. Role (¿ªÇÒ) - µ¿¿µ»ó, Á¤Áö¿µ»ó Á¦Ç°ÀÇ SW ÇÁ·Î±×·¥(VADAV)À» °³¹ß ¹× À¯Áöº¸¼öÇϰí, ÀÚ»ç System IntegrationÀ» À§ÇÑ HW/FW/SW ±â¼úÀ» Áö¿øÇÑ´Ù. 2. Responsibility - Á¤Áö¿µ»ó, µ¿¿µ»ó Á¦Ç°ÀÇ VADAV °³¹ß ¹× À¯Áöº¸¼ö, SDK Release ¹× °ü¸® - °í°´»ç SW/System Integration Áö¿ø 3. Required Competency (Knowledge, Skill, Experience) 1) Knowledge - °´Ã¼ÁöÇâÇÁ·Î±×·¡¹Ö : C++, C#, Java µî °³¹ß ¾ð¾î Áö½Ä - ÄÄÇ»ÅÍ ½Ã½ºÅÛ/ÄÄÇ»ÅÍ ¾ÆÅ°ÅØÃ³ : PC ÇÁ·Î±×·¥À» °³¹ßÇϱâ À§ÇÑ ±âº» Áö½Ä - ÄÄÇ»ÅÍ ³×Æ®¿öÅ©/µ¥ÀÌÅÍ º£À̽º(PC Åë½Å¿¡ ´ëÇÑ ÀÌÇØ) - ÀÓº£µðµåÄÄÇ»ÆÃ / ¸ÖƼÄÚ¾îÇÁ·Î±×·¡¹Ö : Á¦Ç° Control ¹× ¿µ»ó ȹµæÀ» À§ÇÑ Áö½Ä 2) Skill - Visual Studio¸¦ ÀÌ¿ëÇÑ ÇÁ·Î±×·¥ °³¹ß ±â¼ú - PC interfaceÀÇ Packet Åë½Å °³¹ß ¹× ºÐ¼® ±â¼ú - Open source, ¶óÀ̺귯¸® Àû¿ë ÇÁ·Î±×·¥ °³¹ß ±â¼ú 3) Experience - TCP/IP Åë½Å ÇÁ·Î±×·¥ °³¹ß °æÇè - Device Á¦Ç° Control ¹× Evaluation ÇÁ·Î±×·¥ °³¹ß °æÇè - ¾ç»ê ÇÁ·Î±×·¥ °³¹ß °æÇè 4) Àü°ø, ÀÚ°ÝÁõ µî ±âŸ ¿ä±¸ »çÇ× - Àü°ø : SW°³¹ß, ÄÄÇ»ÅͰøÇÐ, ITÀ¶ÇÕ°øÇÐ - ¿ì´ë »çÇ× :¿µ¾î °¡´ÉÀÚ, HW Control ¹× ÀǷ῵»ó󸮰³¹ß °æÇè ¿ì´ë
3. HW°³¹ß 1. Role (¿ªÇÒ) - CMOS/TFT detector ½ÅÁ¦Ç°ÀÇ HW °³¹ß(¼³°è/°ËÁõ/ÃÖÀûÈ/Debugging)ÇÑ´Ù. - ÀÎÁõ/ǰÁú/Á¦Á¶/¾ç»ê µîÀÇ Field issues¸¦ ºÐ¼® ÈÄ °³¼±Çϰí Á¦Ç°ÀÇ ¼º´É ¹× ǰÁúÀ» È®º¸ÇÑ´Ù. 2. Responsibility 1) Power Logic ¼³°è - LDO, DCDC, Discrete power µ¿ÀÛ ¿ø¸® ¹× ¼³°è - ÃæÀüµ¿ÀÛ¿ø¸® ÀÌÇØ ¹× ÃæÀüȸ·Î ¼³°è - ¼Ò¸ðÀü·ù ÃÖÀûÈ ¼³°è 2) Digital ȸ·Î ¼³°è - MCU, FPGA µ¿ÀÛ ÀÌÇØ ¹× ȸ·Î ¼³°è - USB, I2C, SPI, MIPI µî digital I/O ȸ·Î¼³°è - ROIC, GATE IC ÀÌÇØ ¹× ȸ·Î¼³°è - TFT Panel, CMOS Sensor ±¸Á¶ ¹× µ¿ÀÛ ÀÌÇØ, ÀÎÅÍÆäÀ̽º ¼³°è 3) Analog ȸ·Î ¼³°è - Analog Signal ÇØ¼®À» ÅëÇÑ Op-Amp ȸ·Î ¼³°è - Noise ¹ß»ý ¸ÞÄ¿´ÏÁò ºÐ¼® ¹× Noise Àú°¨ ¼³°è 4) ȸ·Î ºÐ¼®/ÇØ¼® - ȸ·Îµµ Design, Artwork ºÐ¼® ¹× Pattern ¼³°è, Ãþ±¸¼º ÃÖÀûÈ, ground ¼³°è - ȸ·Îµµ ºÐ¼® ¹× ¹®Á¦Á¡ ÆÄ¾Ç, ÇØ°á¾È Á¦½Ã 3. Required Competency (Knowledge, Skill, Experience) 1) Knowledge - Analog ¹× Digital ȸ·Î ÀÌ·Ð(ȸ·Î ±¸¼º, µ¿ÀÛ ¿ø¸® ÀÌÇØ) - ÀüÀÚ°øÇÐ (´Éµ¿¼ÒÀÚ, ¼öµ¿¼ÒÀÚ) - Data Àü¼ÛÀ» À§ÇÑ Åë½Å InterfaceÀÇ ÀÌÇØ 2) Skill ¡Ø OrCAD, PADS, Allegro µîÀÇ Tool »ç¿ë - Analog ȸ·ÎÀÇ Filter, Layout ¼³°è - MCU, FPGA ÁÖº¯ ȸ·Î ±¸¼º ¹× Layout ¼³°è 3) Experience - Opamp¸¦ Ȱ¿ëÇÑ Analog ȸ·Î ¼³°è °æÇè - °èÃø±â Ȱ¿ë, ȸ·Î ÇØ¼®À» ÅëÇÑ Test plan ¼ö¸³ °æÇè (µð¹ö±ë) 4) Àü°ø, ÀÚ°ÝÁõ µî ±âŸ ¿ä±¸ »çÇ× - Àü°ø : ÀüÀÚ/ÀüÆÄ/ÄÄÇ»ÅÍ/±â°è°øÇÐ - ¿ì´ë »çÇ× ¿µ¾î °¡´ÉÀÚ (Datasheet ȤÀº °ü·Ã ³í¹®À» ÀÐ°í ³»¿ëÀ» ÆÄ¾ÇÇÒ ¼ö ÀÖ´Â ¼öÁØ) Àü±â, ÀüÀÚ ±â»ç ÀÚ°ÝÁõ º¸À¯ÀÚ
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