LX¼¼¹ÌÄÜ, 2026³â 5¿ù °æ·Â»ç¿ø ´ë±Ô¸ð ä¿ë¡¦ ¹ÝµµÃ¼ ¼³°è¡¤¹æ¿¼Ö·ç¼Ç µî ´Ù¾çÇÑ ºÐ¾ß ¸ðÁý
LX¼¼¹ÌÄÜÀÌ 2026³â 5¿ù °æ·Â»ç¿ø ä¿ëÀ» ÁøÇàÇÑ´Ù. À̹ø ä¿ëÀº »óǰ±âȹ, MCU Digital Design, Digital Design, Firmware, Design Platform Digital Design, SW Engineering, Auto P&R, Timing Controller Verification, DDR PHY/Controller, CPU/MCU, AXI Bus, Design Verification, SerDes Architect(Link¡¤PHY), ¹æ¿¼Ö·ç¼Ç Product Engineering, ǰÁú, ¿¡Äª, Project Management, ¼±Çà±â¼ú, »ý»ê±â¼ú µî ¹ÝµµÃ¼ ¼³°èºÎÅÍ ¹æ¿¼Ö·ç¼Ç, ǰÁú, »ý»ê±â¼ú¿¡ À̸£±â±îÁö Æø³ÐÀº Á÷¹«¿¡ °ÉÃÄ °æ·ÂÀÚ¸¦ ¸ðÁýÇÑ´Ù.
Á÷¹«º° ¾÷¹« ³»¿ëÀ» »ìÆìº¸¸é, »óǰ±âȹ ºÐ¾ß¿¡¼´Â ½Å±Ô Á¦Ç° Concept ¼ö¸³À» À§ÇÑ °í°´ ´ÏÁî ºÐ¼® ¹× Á¦Ç° ºÐ¼®, 3C ºÐ¼®(°í°´/°æÀï»ç/ÀÚ»ç)À» ÅëÇÑ PRM ¼ö¸³, °í°´ ´ëÀÀÀ» À§ÇÑ ±â¼ú Promotion¡¤RFQ ÀÛ¼º, Á¦Ç° °³¹ß ÁøÇàÀ» À§ÇÑ ¿ø°¡ ¹× »ç¾÷¼º ºÐ¼®À» ´ã´çÇÏ°Ô µÈ´Ù. MCU Digital Design ¹× Digital Design ºÐ¾ß¿¡¼´Â ¼ÒºñÀÚ ¹× ÀÚµ¿Â÷ MCU¿ë µðÁöÅÐ IP¡¤ÁýÀûȸ·Î ¼³°è ¹× °³¹ß·Î, ½Ã½ºÅÛ ¾ÆÅ°ÅØÃ³¡¤µðÁöÅÐ TOP¡¤IP ¼³°è ¹× °ËÁõ¡¤ÇÁ·ÐÆ®¿£µå, CPU ÄÚ¾î(ARM Cortex-M ½Ã¸®Áî/RISC-V)¡¤¹ö½º ¸ÅÆ®¸¯½º¡¤¸Þ¸ð¸® ÄÁÆ®·Ñ·¯(e-Ç÷¡½Ã)¡¤ÁÖº¯±â±â¡¤CAN/LIN ÄÁÆ®·Ñ·¯¡¤¾Æ³¯·Î±× IP ó¸®(ADC/LDO), ¸ðÅÍ Á¦¾î ½Ã½ºÅÛ(BLDC, BDC), º¸¾È ½Ã½ºÅÛ(¾ÏÈ£ÈµÈ IP, Ű °ü¸®, º¸¾È ºÎÆÃ)À» ´Ù·ç°Ô µÇ¸ç, Firmware Á÷¹«¿¡¼´Â MCU(Cortex-M) ±â¹Ý Firmware Programming(C¾ð¾î), ±âº»ÀûÀÎ Digital¡¤Analog ȸ·Î ºÐ¼®, °¡ÀüÇ⡤AutoÇâ MCU Á¦Ç° °ü·Ã FAE ¾÷¹«¸¦ ¸Ã°Ô µÈ´Ù. Design Platform Digital Design¿¡¼´Â Armv8-M, Armv8-R °è¿ÀÇ CPU¸¦ Multi·Î Àû¿ëÇÑ ÇÁ·ÎÁ§Æ®ÀÇ HW Architecting, Automotive MCU Platform °³¹ß(ȯ°æ ±¸Ãà, °³¹ß, °ËÁõÀ» Æ÷ÇÔÇÑ Àü¹Ý ¾÷¹«), Automotive MCU System Interconnect °³¹ß(AMBA, NoC µî), Automotive MCU Memory I/F °³¹ß(RAM, ROM, External Storage), General ¹× Automotive »ç¾çÀÇ Function ¹× Communication IPÀÇ °³¹ß, Safety ¹× Security ¸ñÀûÀÇ IP °³¹ß(¿¡·¯°ËÃâ, ¾ÏÈ£È/º¹È£È µî), On-Chip Profiling ¹× Test Architecturing, FPGA¡¤Emulator¡¤Virtualization¡¤Modeling¡¤Digital TWIN µîÀ» Ȱ¿ëÇÑ Platform °³¹ßȯ°æ ±¸Ãà, Automotive ÀÎÁõ°ü·Ã Guide¡¤Manual ÀÛ¼ºÀ» ¼öÇàÇÏ°Ô µÈ´Ù. SW Engineering Á÷¹«¿¡¼´Â Bare-metal ¹× RTOS ±â¹Ý SW Ç÷§Æû(BSP) ¼³°è ¹× °³¹ß(FreeRTOS, OSEK, Zephyr µî), Multi-core ȯ°æ¿¡¼ Core bring-up ¹× µ¿±âÈ ±¸Á¶ ¼³°è ¹× ±¸Çö, Peripheral Driver °³¹ß ¹× HW Bring-up, ½Ã½ºÅÛ ÃʱâÈ ¹× Boot Sequence ¼³°è ¹× °³¹ß, ¼º´É ÃÖÀûÈ ¹× ÀúÀü·Â(Power Management) ±â´É °³¹ß, System Debugging ¹× ¾ÈÁ¤¼º °³¼±À» °æÇèÇÏ°Ô µÇ¸ç, Auto P&R(PI/DFT/PD) Á÷¹«¿¡¼´Â T-Con¡¤Mobile DDI¡¤SD-IC¡¤MCU PI/DFT/PD, °¢ Á¦Ç° Ư¼ºÀ» °í·ÁÇÑ PPA ÃÖÀûÈ Àü·« ¼ö¸³À» ÅëÇØ Á¦Ç° °æÀï·Â È®º¸, Physical-aware Synthesis ±â¹Ý QoR °³¼±(SNPS/CDNS), ieee1687¡¤ieee1500 ±â¹Ý DFT ±¸Á¶ ¼³°è ¹× MBIST/SCAN Architecture Á¤ÀÇ, DFT Vector generation¡¤Test time È¿À² °³¼± ¹× yield °³¼± Ȱµ¿, Innovus/ICC2/Fusion Compiler ±â¹Ý P&R ¼öÇà, Multi Power¡¤Low power Àû¿ëÇÑ PI/PD, STA ±â¹Ý Timing Closure Àü·« ¼ö¸³ ¹× Physical-aware ECO ÁÖµµ¡¤°¢Á¾ Process °í·ÁÇÑ Timing sign-off, Physical verification(DRC/LVS/ANT µî) À̽´ ºÐ¼® ¹× Tape-out ǰÁú È®º¸, EM/IR Drop À̽´¿¡ ´ëÇÑ Root Cause ºÐ¼® ¹× Sign-off ÁÖµµ, Foundry/EDA Vendor Çù¾÷À» ÅëÇÑ ¼³°è À̽´ ÇØ°á ¹× Flow °³¼±À» ´ã´çÇÏ°Ô µÈ´Ù. Timing Controller Verification¿¡¼´Â Top integration/Top regression test ȯ°æ ±¸Ãà, IP º° regression Å×½ºÆ® ȯ°æ ±¸Ãà, FPGA/ZEBU °ËÁõ ¹× ÇÊ¿ä °ËÁõ IP °³¹ßÀ» ¼öÇàÇϰí, Digital Design(DDR PHY/Controller) Á÷¹«¿¡¼´Â LPDDR 4/5 PHY/Controller °³¹ß·Î Digital PHY RTL ¼³°è¡¤Timing Constraint ÀÛ¼º¡¤Physical Implementation Guide ¹× Áö¿ø, LPDDR4 memory controller ±â¹ÝÀ¸·Î LPDDR5 memory controller °³¹ßÀ» ¸Ã°Ô µÈ´Ù. Digital Design(CPU/MCU)¿¡¼´Â T-Con °³¹ß °úÁ¦¿¡ µû¸¥ MCU Platform °³¹ß ¹× °ü·Ã Peri ¼³°è, SoC °³¹ß ½Ã Target PPA ¸¸Á·À» À§ÇÑ Core¿Í Configuration ¼±Á¤, RTL¡¤SDC ¹× Power Intent ÀÛ¼º°ú °ËÁõ, °¢Á¾ Benchmark¸¦ ÅëÇÑ ¼º´É Æò°¡, Physical Implementation ´Ü°èº° °ËÁõ°ú multi-core power °ü¸®¸¦ ´ã´çÇϸç, Digital Design(AXI Bus) Á÷¹«¿¡¼´Â APB¡¤AHB¡¤AXI Master/Slave/Async bridge IP ¼³°è, Bus rate control IP¡¤Arbiter ¼³°è, DDR°ú ¿¬°èÇÏ¿© Bus Æ©´×¡¤ÃÖ´ë BW È®´ë, ½Å±Ô LPDDR4/5 ¿¬°èÇÏ¿© Bus backbone ¼³°è¸¦ ¼öÇàÇÏ°Ô µÈ´Ù. Design Verification Á÷¹«¿¡¼´Â UVM(Universal Verification Methodology)À» Ȱ¿ëÇÑ Digital IP ¼³°è °ËÁõ, SystemVerilogÀ» Ȱ¿ëÇÑ Assertion based Verification/Coverage Based Verification, Display Driver IC/Gate Driver IC/VR/TCON Á¦Ç°±º¿¡ ´ëÇÑ ¼³°è °ËÁõ, Real Number ModelingÀ» ÅëÇÑ AMS °ËÁõ, ScriptÀ» Ȱ¿ëÇÑ ¾÷¹« È¿À²¼º °È ¹× ÀÚµ¿È¸¦ °æÇèÇÏ°Ô µÈ´Ù. Interface ºÐ¾ßÀÇ SerDes Architect(Link) Á÷¹«¿¡¼´Â High Speed Interface ¹× SerDes Digital IP ȸ·Î ¼³°è ¹× °ËÁõ(eDP, MIPI, Vx1, CEDS µî), Digital IP ¼³°è(DSC, FEC, HDCP µî), FPGA IP(GTY, SerDes, FPLL µî) Ȱ¿ëÇÑ °í¼Ó ÀÎÅÍÆäÀ̽º ȸ·Î ¼³°è, MCU Bus Architecture ¹× Peripheral IP ¼³°è¸¦ ´ã´çÇϸç, SerDes Architect(PHY) Á÷¹«¿¡¼´Â DP/PCIe/USB/Ethernet/LPDDR µî °í¼Ó Interface IP ¼³°è, SerDes ±¸¼º ȸ·Î ¼³°è(Architecture¡¤Transmitter¡¤Analog Front End¡¤PI-based CDR)¸¦ ¸Ã°Ô µÈ´Ù. ¹æ¿¼Ö·ç¼Ç Product Engineering¿¡¼´Â ¼¼¶ó¹Í ¹æ¿±âÆÇ ±â¼ú °³¹ß·Î »ç¾ç ºÐ¼® ¹× °³¹ß »ùÇà Á¦ÀÛ¡¤³³Ç°¡¤ºÒ·® ´ëÀÀ, ¼¼¶ó¹Í ±âÆÇ/ÆÄ¿ö¸ðµâÀÇ ±¸Á¶ ÇØ¼®¡¤¿Çؼ® ½Ã¹Ä·¹À̼Ç, °øÁ¤ °³¹ß ¹× ¼º´É Æò°¡/ºÐ¼®À» ¼öÇàÇϰí, ǰÁú Á÷¹«¿¡¼´Â ³»ºÎ ¹× °í°´ ǰÁú´ëÀÀ(QA) ½Ç¹«¸¦ ´ã´çÇÏ°Ô µÈ´Ù. ¿¡Äª Á÷¹«¿¡¼´Â Cu ½À½Ä¿¡Äª(DES Line)À¸·Î DES ¼³ºñ ÃÖÀûÈ ¹× ½Å±Ô ¼³ºñ Set-up, »ç¾ç ºÐ¼® ¹× °³¹ß Sample Á¦ÀÛ ¹× ºÒ·® ´ëÀÀÀ» ¸ÃÀ¸¸ç, Project Management¿¡¼´Â °³¹ß ÇÁ·ÎÁ§Æ® ÃѰý, °³¹ß ¸®¼Ò½º °ü¸® ¹× °³¹ß ÀÏÁ¤ °ü¸®, °í°´ ´ëÀÀ ¹× °³¹ß Risk °ü¸® ¹æ¾È µµÃâÀ» ´ã´çÇÏ°Ô µÈ´Ù. ¼±Çà±â¼ú Á÷¹«¿¡¼´Â ¸ð¹ÙÀÏ AP/°í¼º´É ¹ÝµµÃ¼ ÆÐŰÁö¿ë ¿°ü¸®(thermal) ¼ÒÀç ¹× ±¸Á¶ ¼±Çà °³¹ß·Î ±Ý¼Ó/º¹ÇÕ ¼ÒÀç ±â¹Ý ¿Àüµµ Ư¼º ¹× ±¸Á¶ ¼³°è(¿ È®»ê ¼º´É, °è¸é ÀúÇ×, warpage µî Æ÷ÇÔ), ÆÐŰÁö ±¸Á¶-¼ÒÀç ¿¬°è Thermal ÇØ¼® ¹× ¼³°è ÃÖÀûÈ(CAE ±â¹Ý ½Ã¹Ä·¹ÀÌ¼Ç ¹× ½ÇÃø µ¥ÀÌÅÍ correlation), ÆÐŰÁö Àû¿ë ȯ°æ¿¡¼ÀÇ ¿/±â°è ½Å·Ú¼º Æò°¡ ¹× °³¼±(Thermal Cycle, Drop, Warpage, Àå±â ¿È ¸ÞÄ¿´ÏÁò ºÐ¼®), ½Å±Ô ¼ÒÀç/±¸Á¶ÀÇ ¾ç»ê Àû¿ëÀ» À§ÇÑ °øÁ¤ °³¹ß ¹× ¾ç»ê À̰ü(APQP ±â¹Ý °³¹ß, Çù·Â»ç ¹× ³»ºÎ »ý»ê Á¶Á÷ Çù¾÷), °í°´»ç(±Û·Î¹ú ÆÕ¸®½º/¸ðµâ»ç) ¿ä±¸ Spec ºÐ¼® ¹× ±â¼ú ´ëÀÀ(Thermal target, µÎ²² Á¦¾à, cost trade-off µî), ¿ÜºÎ ¼ÒÀç/ºÎǰ Çù·Â»ç ¹ß±¼ ¹× ±â¼ú Çù¾÷ ¸®µù(Supplier ±â¼ú °ËÁõ, dual sourcing °ËÅä), Â÷¼¼´ë ÆÐŰÁö ¿°ü¸® ±â¼ú ·Îµå¸Ê ¼ö¸³ ¹× ½Å±Ô ¾ÆÀÌÅÛ ±âȹÀ» °æÇèÇÏ°Ô µÇ¸ç, »ý»ê±â¼ú Á÷¹«¿¡¼´Â OEE¡¤°¡µ¿·ü¡¤MTTR¡¤MTBF µî Àåºñ°ü·Ã ÁöÇ¥°ü¸®, Àåºñ Preventive Maintenance °ü¸®, Àåºñ Æ®·¯ºí½´ÆÃ ¹× Àåºñ °³¼±¾÷¹« ÁøÇà, »ý»êÀåºñ Capa ¹× ¼öÀ²°³¼±, ÇöÀå¾÷¹« ÀÛ¾÷°³¼± °ü·Ã Jig ¹× Tool °³¹ß, IATF16949 ¹× °í°´»ç°ü·Ã ¹®¼ÀÛ¼º ¹× ½É»ç´ëÀÀÀ» ´ã´çÇÏ°Ô µÈ´Ù.
Á÷¹«º° ÀÚ°Ý ¿ä°ÇÀÌ »óÀÌÇϸç, °¢ Á÷¹«ÀÇ ÀÚ°Ý¿ä°Ç°ú ¿ì´ë»çÇ×Àº ´ÙÀ½°ú °°´Ù. »óǰ±âȹÀº Çлç Á¹¾÷ ±âÁØ °æ·Â 3³â ÀÌ»óÀÌ¸ç ½Ã½ºÅÛ ¼³°è °æÇè ¶Ç´Â ºÐ¼® ¿ª·® º¸À¯ÀÚ¸¦ ÇÊ¿ä·Î Çϰí, ¿µ¾î ´ÉÅëÀÚ¸¦ ¿ì´ëÇÑ´Ù. MCU Digital Design(Digital Architect)Àº Çлç Á¹¾÷ ±âÁØ °æ·Â 10³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, Safety IP Design for automotive MCU, Functional Safety related verification and document development, Understanding IC Layout, Fluent in English conversationÀ» ¿ì´ëÇÑ´Ù. Digital DesignÀº Çлç Á¹¾÷ ±âÁØ °æ·Â 5³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, Safety IP Design for automotive MCU, Functional Safety related verification and document development, Understanding IC Layout, Fluent in English conversationÀ» ¿ì´ëÇÑ´Ù. Firmware´Â Çлç Á¹¾÷ ±âÁØ °æ·Â 5³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, Windows GUI °³¹ß(C#, MFC µî), BLDC ¸ðÅÍ Á¦¾î °æÇè(°æ·ÂÀÚ), ¿µ¾î/Áß±¹¾î ´ÉÅëÀÚ¸¦ ¿ì´ëÇÑ´Ù. Design Platform Digital DesignÀº Çлç Á¹¾÷ ±âÁØ °æ·Â 6³â ÀÌ»óÀ̸ç HDL ¹× EDA Tool »ç¿ë ¼³°è ºÐ¾ß ÁÖ ¾÷¹« 6³â ÀÌ»óÀÌ ÇʼöÀ̰í, MCU(General ¹× Automotive) ¼³°è °æÇè, System ¹× Subsystem Integration °æÇè, Multi Processor ¹× Security Architecture °æÇè, Communication IP °æÇè, ISO26262¡¤ISO21434¡¤ASPICE Process °æÇè, MCAL¡¤AUTOSAR °æÇè, ¹ÝµµÃ¼ Á¦Ç° ±âȹ/¼³°è/Å×½ºÆ® °æÇèÀ» ¿ì´ëÇÑ´Ù. SW EngineeringÀº ¼®»ç ÀÌ»óÀ¸·Î ¼®»ç Á¹¾÷ ±âÁØ °æ·Â 3³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, Embedded SW °³¹ß °æÇè(AP/MCU/Bare-metal/RTOS), RTOS ±â¹Ý °³¹ß °æÇè, Multi-core(SMP/AMP) ±¸Á¶ ÀÌÇØ ¶Ç´Â °ü·Ã °³¹ß °æÇè, Peripheral(UART, SPI, I2C, LIN, CAN µî) Driver °³¹ß °æÇè, Bootloader ¶Ç´Â ½Ã½ºÅÛ ÃʱâÈ ÄÚµå °³¹ß °æÇè, Linux Kernel/Device Driver °³¹ß °æÇè, Secure Boot¡¤TEE(OP-TEE)¡¤HSM µî º¸¾È ±¸Á¶¿¡ ´ëÇÑ ÀÌÇØ ¶Ç´Â °æÇè, Power Management(DVFS, Sleep µî) °ü·Ã °æÇè, HW Debugging °æÇè(JTAG, Trace32, JLink µî), ARM Architecture ¹× Low-level SW ÀÌÇØ, Automotive/IoT/Mobile ºÐ¾ß °³¹ß °æÇè, ¿ÀǼҽº Contribution ¶Ç´Â Embedded ÇÁ·ÎÁ§Æ® °æÇè, ¿µ¾î ´ÉÅëÀÚ¸¦ ¿ì´ëÇÑ´Ù. Auto P&R(PI/DFT/PD)Àº Çлç Á¹¾÷ ±âÁØ °æ·Â 4³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, DFT ¾ç»ê À¯°æÇèÀÚ, FinFET °øÁ¤ À¯°æÇèÀÚ, IR-drop À¯°æÇèÀÚ, ¿µ¾î °¡´ÉÀÚ¸¦ ¿ì´ëÇÑ´Ù. Timing Controller VerificationÀº Çлç Á¹¾÷ ±âÁØ °æ·Â 4³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, UVM¡¤ZEBU¡¤FPGA °ü·Ã °æÇè ¹× Áö½Ä º¸À¯, ºñµð¿À ½Ã½ºÅÛ °³¹ß °ËÁõ °æÇè º¸À¯¸¦ ¿ì´ëÇÑ´Ù. Digital Design(DDR PHY/Controller)Àº Çлç Á¹¾÷ ±âÁØ °æ·Â 4³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, DDR PHY¡¤Controller ¼³°è ¹× ¾ç»ê °ü·Ã °æÇè ¹× Áö½Ä º¸À¯¸¦ ¿ì´ëÇÑ´Ù. Digital Design(CPU/MCU)Àº Çлç Á¹¾÷ ±âÁØ °æ·Â 4³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, SoC ¾ç»ê °³¹ß °æ·Â, ARM CPU/MCU ±×¸®°í RISC-V °³¹ß °æÇèÀÚ¸¦ ¿ì´ëÇÑ´Ù. Digital Design(AXI Bus)Àº Çлç Á¹¾÷ ±âÁØ °æ·Â 4³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, ARM CPU¡¤Bus °ü·Ã °æÇè ¹× Áö½Ä º¸À¯¸¦ ¿ì´ëÇÑ´Ù. Design VerificationÀº Çлç Á¹¾÷ ±âÁØ °æ·Â 2³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, System Verilog ¹× UVM(Universal Verification Methodology) »ç¿ë °æÇèÀÚ, C ¶Ç´Â Python Language Ȱ¿ë ¿ì¼öÀÚ, TOP Simulation Infra ±¸Ãà °æÇèÀÚ, ¿µ¾î ´ÉÅëÀÚ¸¦ ¿ì´ëÇÑ´Ù. SerDes Architect(Link)´Â ¼®»ç ÀÌ»óÀ¸·Î ¼®»ç Á¹¾÷ ±âÁØ °æ·Â 2³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, RTL ¼³°è °æÇè º¸À¯ÀÚ(Verilog, System Verilog µî), ÀÎÅÍÆäÀ̽º Ç¥ÁØ ½ºÆå ¹× SerDes IP ¼³°è °æÇèÀÚ(eDP, MIPI, Vx1, BoW, UCIe, PCIe), Display °ü·Ã ASIC IC °æÇèÀÚ(T-Con, Mobile Driver IC, Source Driver IC, ÈÁúIP), Ethernet ¼³°è °æÇèÀÚ(MAC, Link Layer, PHY Interface µî), HDCP/DSC/FEC ¼³°è °æÇèÀÚ, MCU Firmware °æÇèÀÚ, Github Copilot Ȱ¿ë RTL ¼³°è °æÇèÀÚ, ¿µ¾î ´ÉÅëÀÚ¸¦ ¿ì´ëÇÑ´Ù. Analog Design(SerDes Architect(PHY))Àº ¼®»ç ÀÌ»óÀ¸·Î ¼®»ç ¶Ç´Â ¹Ú»ç Á¹¾÷ ±âÁØ °æ·Â 3³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, 16Gbps ÀÌ»ó °í¼Ó SerDes IP ¾ç»ê/°³¹ß ¹× °ËÁõ °æÇèÀÚ, FinFET °øÁ¤ ¼³°è ¼÷·ÃÀÚ, EDA Tool ¼÷·ÃÀÚ, ¿µ¾î¡¤Áß±¹¾î¡¤ÀϺ»¾î ´ÉÅëÀÚ¸¦ ¿ì´ëÇÑ´Ù. ¹æ¿¼Ö·ç¼Ç Product EngineeringÀº ¼®»ç ÀÌ»óÀ¸·Î ¼®»ç Á¹¾÷ ±âÁØ °æ·Â 10³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, DBC¡¤AMB ¼¼¶ó¹Í Á¢ÇÕ °ø¹ý °æÇèÀÚ, ÆÄ¿ö¸ðµâ °³¹ß °æÇè º¸À¯ÀÚ, ¿Çؼ® °æÇè º¸À¯ÀÚ¸¦ ¿ì´ëÇÑ´Ù. ǰÁúÀº Çлç Á¹¾÷ ±âÁØ °æ·Â 3~5³âÀ̸ç ÀϺ»¾î È¸È ´ÉÅëÀÚ, PCS °øÁ¤ ÀÌÇØ°¡ ÇʼöÀ̰í, ISO9001 or IATF16949 ÀÎÁõ ¾÷¹« ´ëÀÀ °æ·Â, PCB °øÁ¤±â¼ú ¹× ǰÁúº¸Áõ¾÷¹« ´ëÀÀ °æÇè, ÀÚµ¿Â÷ ǰÁú½Ã½ºÅÛ¿¡ ´ëÇÑ ÀÌÇØ¸¦ °¡Áø ÀÚ¸¦ ¿ì´ëÇÑ´Ù. ¿¡ÄªÀº Çлç Á¹¾÷ ±âÁØ °æ·Â 10³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, PCB¡¤Lead frame µî Cu ¿¡Äª Àü¹Ý¿¡ °ÉÄ£ °øÁ¤ ÀÌÇØ, Heavy Copper ¶Ç´Â ÀüÀåÁ¦Ç° ¿¡Äª °æÇè º¸À¯ÀÚ¸¦ ¿ì´ëÇÑ´Ù. Project Management´Â Çлç Á¹¾÷ ±âÁØ °æ·Â 3³â ÀÌ»óÀ̸ç ÀϺ»¾î È¸È ´ÉÅëÀÚ°¡ ÇʼöÀ̰í, ÀÚµ¿Â÷ °³¹ß(APQP) ¶Ç´Â ±× ¿Ü »ç¾÷ °³¹ß/ǰÁú °æÇèÀÚ, PCS °øÁ¤ ±â¼ú ¹× ǰÁú°æÇèÀÚ, ÀÚµ¿Â÷ ǰÁú½Ã½ºÅÛ¿¡ ´ëÇÑ ÀÌÇØ¸¦ °¡Áø ÀÚ¸¦ ¿ì´ëÇÑ´Ù. ¼±Çà±â¼úÀº Çлç Á¹¾÷ ±âÁØ °æ·Â 4³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, APQP ¹× ¿¬±¸°³¹ß ÇÁ·Î¼¼½º Àü¹Ý¿¡ ´ëÇÑ ÀÌÇØ ¹× ½Ç¹« À¯°æÇèÀÚ, ±Ý¼Ó Àç·á/º¹ÇÕ Àç·á °ü·Ã ¾ç»êÀ̰ü ¾÷¹« À¯°æÇèÀÚ¸¦ ¿ì´ëÇÑ´Ù. »ý»ê±â¼úÀº Çлç Á¹¾÷ ±âÁØ °æ·Â 10³â ÀÌ»óÀÌ ÇÊ¿äÇϸç, Àü±â¡¤±â°è¡¤¸ÞīƮ·Î´Ð½º °ü·Ã Àü°øÀÚ, PCB Àåºñ °ü·Ã °æÇèÀÚ, PCÁ¦¾î Àåºñ Æ®·¯ºí ½´ÆÃ °¡´ÉÀÚ, Àü±â Sequence¡¤PLCÁ¦¾î¡¤´Ù°üÀý ·Îº¿ °æÇèÀÚ, 3D ¹× 2D(Autocad) µµ¸é ÀÛµµ °¡´ÉÀÚ¸¦ ¿ì´ëÇÑ´Ù.
¸ðÁý Á÷¹«º°·Î °è¾à ÇüÅ ¹× ±Ù¹« ÇüÅ´ °ø°í¿¡ º°µµ ¸í½ÃµÇÁö ¾Ê¾ÒÀ¸¸ç, ±Ù¹« Áö¿ªÀº Á÷¹«¿¡ µû¶ó ¼¿ï °³²±¸, ´ëÀü À¯¼º±¸, ´ë±¸±¤¿ª½Ã, °æ±âµµ ½ÃÈï½Ã µîÀ¸·Î ³ª´¶´Ù. Áö¿ø ±â°£Àº 2026³â 5¿ù 8ÀÏ ¿ÀÀü 10½ÃºÎÅÍ 5¿ù 24ÀÏ ¿ÀÈÄ 11½Ã±îÁöÀ̸ç, LX±×·ì ä¿ë»çÀÌÆ®(apply.lxcareers.com)¸¦ ÅëÇÑ ¿Â¶óÀÎ Áö¿ø¸¸ °¡´ÉÇÏ´Ù. ÀüÇü ÀýÂ÷´Â ¼·ùÀüÇü, Àμº°Ë»ç, 1Â÷¸éÁ¢, 2Â÷¸éÁ¢, °Ç°°ËÁø, ÃÖÁ¾ÀüÇü ¼øÀ¸·Î ÁøÇàµÉ ¿¹Á¤ÀÌ´Ù. ÀÚ¼¼ÇÑ ³»¿ëÀº 'LX¼¼¹ÌÄÜ'ÀÇ È¨ÆäÀÌÁö¿¡¼ È®ÀÎÇÒ ¼ö ÀÖ´Ù.